Location: Santa Clara, CA / Bangalore / Hybrid Flexible Type: Full-Time Industry: AI/GenAI, Electronic Design Automation (EDA), Semiconductor Design Recruited by Abotts Inc. | abottstech.com About the Opportunity Abotts is proud to be recruiting on behalf of a high-growth, venture-backed technology startup that is redefining the intersection of Artificial Intelligence and Semiconductor/Hardware Systems Design. Our client is in stealth mode and not yet publicly named however, we can share the following: • Backed by top-tier institutional investors with strong conviction and runway • A seasoned founding team with deep domain expertise in hardware systems and enterprise software • Established traction with marquee blue-chip enterprise customers across the US and India • Operates as a hybrid workforce spanning the US, India, and international markets • Culture rooted in rapid innovation, ownership, and impact-driven execution This is a rare opportunity to join at a pivotal early stage with the upside, pace, and challenge that comes with it.
The Role
We are seeking a Front-End Deployment Engineer to serve as the critical bridge between our groundbreaking AI technology and our customers' engineering teams. In this role, you will leverage your deep understanding of traditional front-end semiconductor design alongside practical expertise in Large Language Models (LLMs). You will act as a technical consultant, problem-solver, and product evangelist, showing top-tier semiconductor and hardware companies how to successfully adopt our LLM-powered platform to eliminate bottlenecks and accelerate their product launches.
What You Will Do
Customer Deployment & Integration: Lead the technical deployment of Abotts products into customer workflows, managing Proof of Concepts (PoCs) and full-scale enterprise rollouts.
LLM-Driven Problem Solving: Deep-dive into customers' specific hardware design and verification challenges. Apply llmdas GenAI tools and your understanding of LLMs to automate tasks.
Workflow Optimization: Analyze existing customer design methodologies and map them to our AI-native capabilities, demonstrating a clear 10-100x improvement in engineering efficiency.
Product Feedback Loop: Act as the "Voice of the Customer." Translate your field experiences and customer feature requests into actionable insights for our internal ML, AI, and Product Engineering teams to improve our model performance.
Technical Enablement: Train customer engineering teams on best practices for using AI-assisted EDA tools and hardware-specific prompt engineering, ensuring high adoption and customer success.
What We Are Looking For
Domain Expertise: 5+ years of hands-on experience in Front-End Semiconductor Design or Verification. You intimately understand the chip design lifecycle from specification to synthesis.
GenAI & LLM Proficiency: You have hands-on experience or a strong, practical understanding of using Large Language Models (LLMs) and Generative AI. You are familiar with how to leverage these tools specifically for hardware engineering tasks (e.g., using AI for code generation, architectural exploration, or automated debugging).
Technical Stack: Deep proficiency in SystemVerilog, Verilog, and RTL design.
Verification Mastery: Strong understanding of current verification methodologies (e.g., UVM, formal verification, coverage-driven verification, and simulation debugging).
Customer-Facing Experience: Previous experience as a Field Application Engineer (FAE), Corporate Applications Engineer (CAE), Deployment Engineer, or a similar customer-facing technical role within the EDA or semiconductor IP industries.
Scripting & Automation: Familiarity with scripting languages (Python, Tcl, Perl) commonly used in hardware environments to stitch tools and workflows together.
Adaptability: You thrive in a dynamic startup environment. You are excited by the prospect of replacing legacy methodologies with cutting-edge AI and can iterate quickly to deliver results.